Integrated circuit systems often include integrated circuits (ICs) that are attached to other ICs, interposer boards, or printed circuit boards in a stacked relationship. The IC system can include, for example, microprocessor circuits, memory circuits, analog circuits, and the like that are interconnected to take advantage of the unique attributes of the individual circuits. By vertically stacking the system components the size or footprint of the system can be minimized.
The integrated circuit system includes at least one IC die that is bonded to another substrate by reflowing solder bumps to provide both physical attachment between the die and the substrate and electrical contact between the die and metallized pads on the substrate. The space between die and substrate must be filled with an under-fill material to protect the surface of the IC and to seal out contaminants. In advanced technologies it is difficult to properly fill the space between die and substrate because of the complex topologies involved, fine pitch between solder bumps, and narrow gap between the joined structures.
Accordingly, it is desirable to provide methods for fabricating integrated circuit systems that include reliable under-fill processes. In addition, it is desirable to provide methods for fabricating IC systems that are compatible with temporary bonding/debonding, wafer level under-fill, and dicing and singulation of IC chips. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.